GB20600-2006 Demodulator

The LGS-8GL5 is a single chip demodulator fully compliant with the China Digital Television Terrestrial Broadcasting System Standard (GB20600-2006).  It uses TDS-OFDM (Time Domain Synchronous - Orthogonal Frequency Division Multiplexing), a core technology on which GB20600-2006 is based. Designed for single-carrier and multi-carrier mobile digital terrestrial reception of high definition, standard definition and other multimedia-based services, the demodulator is intended for low power and space constrained applications such as portable media players (PMP), Ultra-Mobile PCs (UMPC), USB sticks and laptops. The LGS-8GL5 demodulator features an integrated analog-to-digital converter (ADC), fully integrated memory for the time de-interleaver and is available in a 144 BGA package.

The LGS-8GL5 single chip demodulator is an attractive solution that can be used with a low power, small foot-print silicon tuner.  The chip takes an either analog or digital IQ or IF signal as input, performs the necessary demodulation, FEC (forward error correction) decoding, and provides an MPEG-2 transport stream output in parallel or serial format. With an external tuner, a complete RF-to-MPEG front-end system that is fully compliant with GB20600-2006 can be implemented with the LGS-8GL5 demodulator chip.

 

■ Basic Characteristics
  — Package: 144 BGA 10x10mm
  — Temperature range: -40℃ ~ +85℃
  — Power supply: 1.2V / 2.5V
  — Process: 0.13μm CMOS
  — Power Consumption: < 300mW

■ Applications
  — Portable Media Players (PMP)
  — Mobile phones, USB Sticks
  — Laptops
  — UMPCs

■ Development Support
  — Samples
  — Complete Documentation
  — Schematics
  — Evaluation board and software

Product Features
■ Fully compliant with GB20600-2006  standard
■ Supports 4QAM-NR, 4QAM, 16QAM, 32QAM, 64QAM modulation schemes
■ Forward Error Correction (FEC) Rate: 0.4, 0.6, 0.8
■ Guard Interval: PN420, PN595, PN945
■ Time De-Interleaver: M=240 or M=720
■ Automatic parameters discovery and update
■ Integrated dual Analog-to-Digital Converter (ADC)
■ Integrated Time De-Interleaver memory
■ Signal input format
      —— Analog IQ or IF input
      —— Digital IQ or IF input
■ Data output format
      —— MPEG-2 TS (Transport Stream) Synchronous Parallel Interface (SPI)
      —— Synchronous serial and synchronous parallel output mode
■ Automatic recovery functions
      —— Lost signal re-acquisition without external programming
      —— Active impulse noise rejection
      —— Fast acquisition time
■ Low power operation using advanced power saving and management algorithms
■ Excellent multi-path channel and Doppler performance.
■ Excellent Single Frequency Network (SFN) performance
■ Optimized for the best performance under all conditions.
      ——  Impulse noise, echoes, and fading
■ Full I²C Support
■ Complies with RoHS requirements (Pb-free, Green)

Simplified Hardware Design
■ Support for analog IQ or IF and digital IQ or IF signal input from tuners
■ Standard I²C bus control for the system and demodulator
■ MPEG-TS interface to connect with MPEG decoder chips and media processors